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Friday, June 26, 2009

Data communicaitons - CRC Error Detection code

We know that as the data is transmitted, there will be errors introduced, resulting in the change of one or more bits in the transmitted frame. Hence, it is necessary to detect any errors in the transmitted datat to make that what was transmitted is what is received. For this purpose there are many Error detection schemes viz., Parity Check, Cyclic Redundancy Check (CRC) have come up.

CRC is the most commone and one of the most powerful error-detecting codes.

CRC can be described as follows:
"Given a k-bit block of bits, the transmitter generates an n-bit sequence known as a "frame check sequence (FCS)", so that the resulting frame, consisting of (k+n) bits is exactly divisible by some predetermined number". Then, the receiver divides the incoming frame by that number, and, if there is no remainder, then assumes that there is no error".

There are 3-ways for implementing CRC viz.,
1) Modulo 2 arithmetic
2) Polynomials
3) Digital logic

Out of these, Polynomial representation is mostly used. In this representation, CRC generator is represented by an algebraic polynomial with binary coeffecients. Most commonly used polynomials are CRC-8, CRC-10, CRC-16, CRC-CCIIT and CRC-32. The numbers 8, 10, 16, and 32 refer to the FCS. CRC-CCIIT also results in 16 bit FCS.

CRC-32 is used in IEEE-802 (LAN).

I will be adding more details on CRC soon. Please, keep checking for new articles.

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